Given a bipolar junction transistor switch circuit, simulate it to confirm its operation.


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REET 420 Week 4 Lab DeVry

REET 420 Week 4 Lab Overview

Objectives

  • Given a bipolar junction transistor switch circuit, simulate it to confirm its operation.
  • Given an n-channel, low-side switch circuit, simulate it to confirm its operation.
  • Given a p-channel, high-side switch circuit, simulate it to confirm its operation.
  • Continue to develop expertise with Multisim.

Parts List

Software
  • Multisim 11

Introduction

Linear amplifiers can deliver hundreds of watts of power to a load, but more than half of the power is often dissipated by the active device. The device is, essentially, on all the time, regardless of the power demanded by the load. Switching circuits can regulate power much more efficiently to a load because, when the switch if off, very little power is lost. Switching circuits typically achieve greater than 90% efficiency.
To realize this efficiency, transistor switches must be operated very quickly and very precisely. This laboratory carefully examines the switching characteristics of the BJT and the MOSFET. These are the two semiconductor switches used for most lower power converter applications. Before beginning your Lab, download your Lab cover page here (Links to an external site.).

Required Software

This Lab will use the following Lab Resources:
  • Virtual Lab – Citrix
Use a personal copy of the software or access the Lab Resources, go to the Course Resources page – Lab Resources section.

Lab Steps

STEP 1: The Bipolar Junction Transistor Switch

  1. For the bipolar transistor shown in the circuit below, VCE(sat) = 0.8V and Î² = 20. Calculate ICPloadPQ, and Ibase.
  2. Enter the circuit into Multisim, show the output waveform, and verify the numbers with calculated one.
  3. Show the graph of VCE versus Vbase.
https://i1.wp.com/lms.devry.edu/lms/CourseExport/files/068750d9-3702-43a1-977a-4fd86ea34f17/images--image003.jpg?w=900&ssl=1

STEP 2: The N-Channel, Low-Side Switch

  1. Use the circuit below to investigate the speed of an n-channel enhancement mode MOSFET in response to an input of 100 kHz, 50% duty cycle, and 5 Vp.
  2. Adjust the oscilloscope controls and the cursors to measure tstorage, trise, tdelay, and tfall. Include the graph with explanations in your report.
https://i2.wp.com/lms.devry.edu/lms/CourseExport/files/068750d9-3702-43a1-977a-4fd86ea34f17/images--image004.jpg?w=900&ssl=1

STEP 3: P-Channel, High-Side Switch

  1. For the circuit below, determine the voltage at each of the nodes when ein = 2.6 Vp.
  2. When ein is at 30 kHz and 80% duty cycle, calculate PloadPQ, and ΘSA (TJ max = 140° C and TA = 50°C with a mica wafer).
  3. Confirm steps 1 and 2 by simulation. Include the graphs of the node voltages in your report.
  4. Explain any differences in your calculated and simulated results.
https://i0.wp.com/lms.devry.edu/lms/CourseExport/files/068750d9-3702-43a1-977a-4fd86ea34f17/images--image005.jpg?w=900&ssl=1

STEP 4: Questions and Discussion

  1. Compare the pros and cons of linear versus switching regulator circuits.
  2. Explain fully the concepts of tstorage, trise, tdelay, and tfall in switching converter circuits.




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